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PD -96172 IRFB4620PBF HEXFET(R) Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free TO-220AB IRFB4620PBF D G S VDSS RDS(on) typ. max. ID 200V 60m: 72.5m: 25A G D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Parameter Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Max. 25 18 100 144 0.96 20 54 -55 to + 175 300 10lbxin (1.1Nxm) 113 See Fig. 14, 15, 22a, 22b, Units A W W/C V V/ns C c e Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy c d f mJ A mJ Thermal Resistance Symbol RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mount) j Parameter Typ. Max. 1.045 62 Units C/W ij --- 0.50 --- www.irf.com 1 09/05/08 IRFB4620PBF Static @ TJ = 25C (unless otherwise specified) Symbol V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG(int) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance Min. Typ. Max. Units 200 --- --- 3.0 --- --- --- --- --- Conditions --- 0.23 60 --- --- --- --- --- 2.6 --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 5mA 72.5 m VGS = 10V, ID = 15A 5.0 V VDS = VGS, ID = 100A VDS = 200V, VGS = 0V 20 A 250 VDS = 200V, VGS = 0V, TJ = 125C 100 VGS = 20V nA VGS = -20V -100 f --- Dynamic @ TJ = 25C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units --- 25 8.2 7.9 17 13.4 22.4 25.4 14.8 1710 125 30 113 317 --- 38 --- --- --- --- --- --- --- --- --- --- --- --- S Conditions 37 --- --- --- --- --- --- --- --- --- --- --- Effective Output Capacitance (Energy Related)hA --- --- Effective Output Capacitance (Time Related)g VDS = 50V, ID = 15A ID = 15A VDS = 100V nC VGS = 10V ID = 15A, VDS =0V, VGS = 10V VDD = 130V ID = 15A ns RG = 7.3 VGS = 10V VGS = 0V VDS = 50V pF = 1.0MHz (See Fig.5) VGS = 0V, VDS = 0V to 160V VGS = 0V, VDS = 0V to 160V f f h(See Fig.11) g D Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units --- --- --- --- 25 A 100 Conditions MOSFET symbol showing the integral reverse G --- --- 1.3 V --- 78 --- ns --- 99 --- --- 294 --- nC TJ = 125C --- 432 --- --- 7.6 --- A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) p-n junction diode. TJ = 25C, IS = 15A, VGS = 0V TJ = 25C VR = 100V, TJ = 125C IF = 15A di/dt = 100A/s TJ = 25C f S f Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 1.0mH RG = 25, IAS = 15A, VGS =10V. Part not recommended for use above this value . ISD 15A, di/dt 634A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For recom R is measured at TJ approximately 90C Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994. 2 www.irf.com IRFB4620PBF 1000 TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 1000 TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 BOTTOM 10 BOTTOM 10 5.0V 1 5.0V 0.1 60s PULSE WIDTH Tj = 25C 0.01 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 1 60s PULSE WIDTH Tj = 175C 0.1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance (Normalized) Fig 2. Typical Output Characteristics 3.5 3.0 2.5 2.0 1.5 1.0 0.5 ID = 15A VGS = 10V ID, Drain-to-Source Current (A) 100 TJ = 175C T J = 25C 10 1 VDS = 50V 60s PULSE WIDTH 0.1 2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C) VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Fig 4. Normalized On-Resistance vs. Temperature 14.0 VGS, Gate-to-Source Voltage (V) 12.0 10.0 8.0 6.0 4.0 2.0 0.0 ID= 15A 10000 C, Capacitance (pF) VDS= 160V VDS= 100V VDS= 40V 1000 Ciss Coss 100 Crss 10 1 10 100 1000 VDS, Drain-to-Source Voltage (V) 0 5 10 15 20 25 30 35 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3 IRFB4620PBF 100 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100sec 1msec T J = 175C 10 T J = 25C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 10 10msec DC 1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 100 1000 VGS = 0V 1.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 30 25 ID, Drain Current (A) Fig 8. Maximum Safe Operating Area V(BR)DSS , Drain-to-Source Breakdown Voltage (V) VDS, Drain-to-Source Voltage (V) 260 Id = 5mA 250 240 230 220 210 200 190 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( C ) 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (C) Fig 9. Maximum Drain Current vs. Case Temperature 3.0 Fig 10. Drain-to-Source Breakdown Voltage 500 EAS , Single Pulse Avalanche Energy (mJ) 2.5 2.0 450 400 350 300 250 200 150 100 50 0 25 50 75 100 ID TOP 2.05A 2.94A BOTTOM 15A Energy (J) 1.5 1.0 0.5 0.0 -50 0 50 100 150 200 125 150 175 Fig 11. Typical COSS Stored Energy VDS, Drain-to-Source Voltage (V) Starting T J , Junction Temperature (C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent 4 www.irf.com IRFB4620PBF 10 Thermal Response ( Z thJC ) C/W 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 0.001 0.1 J R1 R1 J 1 2 R2 R2 C Ri (C/W) 0.456 0.589 i (sec) 0.000311 0.003759 1 2 Ci= i/Ri Ci i/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.01 0.1 0.001 1E-006 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Duty Cycle = Single Pulse Avalanche Current (A) 10 0.01 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01 Fig 14. Typical Avalanche Current vs.Pulsewidth 120 100 80 60 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 15A Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com EAR , Avalanche Energy (mJ) 5 IRFB4620PBF 6.0 VGS(th), Gate threshold Voltage (V) 90 80 70 60 IRR (A) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( C ) ID = 100A ID = 250uA ID = 1.0mA ID = 1.0A IF = 10A V R = 100V TJ = 25C TJ = 125C 50 40 30 20 10 0 0 200 400 600 800 1000 diF /dt (A/s) Fig 16. Threshold Voltage vs. Temperature 90 80 70 60 IRR (A) Fig. 17 - Typical Recovery Current vs. dif/dt 2000 1800 1600 1400 QRR (A) IF = 15A V R = 100V TJ = 25C TJ = 125C IF = 10A V R = 100V TJ = 25C TJ = 125C 50 40 30 20 10 0 0 200 400 600 800 1000 diF /dt (A/s) 1200 1000 800 600 400 200 0 200 400 600 800 1000 diF /dt (A/s) Fig. 18 - Typical Recovery Current vs. dif/dt 2000 1800 1600 1400 QRR (A) Fig. 19 - Typical Stored Charge vs. dif/dt IF = 15A V R = 100V TJ = 25C TJ = 125C 1200 1000 800 600 400 200 0 200 400 600 800 1000 diF /dt (A/s) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB4620PBF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01 I AS Fig 22a. Unclamped Inductive Test Circuit VDS VGS RG RD Fig 22b. Unclamped Inductive Waveforms VDS 90% D.U.T. + - VDD V10V GS Pulse Width 1 s Duty Factor 0.1 % 10% VGS td(on) tr t d(off) tf Fig 23a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. Fig 23b. Switching Time Waveforms Id Vds Vgs 50K 12V .2F .3F D.U.T. VGS 3mA + V - DS Vgs(th) IG ID Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr www.irf.com Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform 7 IRFB4620PBF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information @Y6HQG@) UCDTADTA6IADSA GPUA8P9@A A DIU@SI6UDPI6G (A! S@8UDAD@S GPBP 96U@A8P9@ @6SAA2A! X@@FA GDI@A8 ( Q6SUAIVH7@S &'( 6TT@H7G@9APIAXXA DIAUC@A6TT@H7GAGDI@AA8A Ir)AAQAAvAhriyAyvrAvv vqvphrAAGrhqAAArrA 6TT@H7G GPUA8P9@ TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site. 8 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 09/2008 www.irf.com |
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